Optimizing an interrogation of a tag population

ABSTRACT

Embodiments of the present invention provide a method and system for optimizing an interrogation of a tag population that includes a plurality of tags. The method includes defining a number of time slots allocated to a first read cycle, and selecting a different number of time slots allocated to a second read cycle based on a duration of the first read cycle.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. patent application Ser. No.10/403,019 to Arneson et al., entitled “Method and System for Optimizingan Interrogation of a Tag Population, filed Apr. 1, 2003, now allowed,which application claims priority to U.S. Provisional Application No.60/368,526, titled “Method and System for Optimizing an Interrogation ofa Tag Population,” filed Apr. 1, 2002, now abandoned, the disclosure ofeach application is incorporated by reference in its entirety.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates generally to electronic inventory systems,and more particularly to the use of radio frequency identification(RFID) tags using anti-clash protocols to perform data applications.

2. Description of the Related Art

In modern business, maintaining an accurate inventory of merchandise iscrucial. In the past, taking an inventory was an entirely manualprocess, and therefore slow and expensive. Modern automated inventorysystems have improved the accuracy and speed of this process whilereducing its cost. With the development of modern manufacturing methods,such as Just-In-Time Delivery, even faster and more accurate inventorymethods are required. In some businesses, inventories must be takenalmost instantaneously.

One approach to electronic inventory systems is the use of RFID tags. Insuch systems, an RFID tag is attached to each item to be inventoried.Each tag includes a microprocessor and RF circuitry capable ofresponding to signals sent from a tag reader. In an ideal inventorysystem, each tag is assigned a unique tag identification number (TagID).

In one such system, the reader transmits a series of clock pulses to thetags. Each clock pulse defines a time slot. Each tag selects aparticular time slot using a random number generator and then counts thereceived time slots. When a given tag's time slot is reached, the tagtransmits its Tag ID to the reader. The reader records the received TagIDs to create an inventory of the tags read.

This approach can suffer from a problem known as “time slot contention.”Time slot contention occurs when more than one tag selects the same timeslot for Tag ID transmission. When this occurs, the reader is bombardedby more than one tag transmission simultaneously. Because the tagsignals interfere with each other, the reader cannot identify the tags.

SUMMARY OF THE INVENTION

The present invention is directed to a method and system for optimizingan interrogation of a tag population that includes a plurality of tags.

In accordance with an embodiment of the present invention there isprovided a method for optimizing an interrogation of a tag populationthat includes a plurality of tags. The method includes defining a numberof time slots allocated to a first read cycle, and selecting a differentnumber of time slots allocated to a second read cycle based on aduration of the first read cycle.

In accordance with another embodiment of the present invention there isprovided a system for optimizing an interrogation of a tag populationthat includes a plurality of tags. The system includes means fordefining a number of time slots allocated to a first read cycle, andmeans for selecting a different number of time slots allocated to asecond read cycle based on a duration of the first read cycle.

The present invention advantageously enables tag interrogationapplications, such as automatic real time inventory control, to beperformed quickly as well as more frequently.

BRIEF DESCRIPTION OF THE FIGURES

The present invention will be described with reference to theaccompanying drawings.

FIG. 1 depicts a tag reader and a plurality of tags according to thepresent invention for use in an electronic inventory system.

FIG. 2 is a flowchart depicting the operation of the present inventionaccording to a preferred embodiment.

FIG. 3A is a circuit block diagram of an RFID tag according to apreferred embodiment of the present invention.

FIG. 3B-3D illustrate an implementation of a demodulator and clockrecovery circuit.

FIG. 4 is a circuit block diagram of the architecture of tag reader 104according to a preferred embodiment.

FIG. 5 is a flowchart depicting a first read operation of a timedbroadcast read of the present invention.

FIG. 6 is a flowchart depicting a second read operation of a timedbroadcast read of the present invention.

FIG. 7 is a flowchart depicting a third read operation of a timedbroadcast read of the present invention.

FIG. 8 is a flowchart depicting a method of manufacture for the RFID tagof the present invention.

FIG. 9 depicts a pair of tags according to the present invention.

FIG. 10 is a flowchart illustrating a dynamic optimization operation.

FIGS. 11-14 are graphical representations of three-dimensional addressspaces.

FIG. 15 is a flowchart illustrating a static optimization operation.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 1.0 Introduction

The present invention is a system and method for electronic inventoryusing radio frequency identification (RFID) tags and an anti-clashprotocol. The anti-clash protocol solves the above-mentioned problem oftime slot contention. The present invention is particularly suited foruse in conducting electronic inventories. In particular, the presentinvention is ideally suited to use for automated real-time inventorycontrol for industries such as distribution and retailing. For example,the present invention enables taking rapid inventories of retail andwarehouse items, as well as tracking the location of these items.

The present invention involves the use of an RFID tag that isinexpensive, disposable, and ideally suited to mass production. The RFIDtag can be inventoried nearly instantaneously using an unobtrusive, lowpower radio signal.

FIG. 1 depicts a tag reader 104 and a plurality of tags 102 a-102 g foruse in an electronic inventory system. In a preferred embodiment of thepresent invention, each tag is permanently allocated a unique Tag ID.The length of this Tag ID is dependent on the number of tags necessaryto adequately cover the inventory. In a preferred embodiment, thisassignment takes place at the time of tag manufacture using technologiessuch as laser-programming or fusible link, which are well-known in therelevant arts. In one embodiment, the Tag ID defines a time slot duringwhich a tag will respond to tag reader 104. The Tag ID can be encryptedfor security purposes. In another embodiment, the Tag ID is a separatevalue, such a universal product code (UPC) that is currently implementedin bar codes and may be combined with a serial number that givesuniqueness for the many products that are in common to a single UPCcode. Referring to FIG. 1, tag 102 a is assigned to slot T₁, tag 102 bis assigned time slot T_(2,) and so on.

In one embodiment, the tag is assigned a single Tag ID. This Tag ID canbe divided into segments, wherein each segment can be used by a tagreader as described below during interrogation (particularly during acontention resolution process). In an another embodiment, each tag canalso be assigned a manufacturer number, representing the identity of themanufacturer of the tag, and a lot number, representing themanufacturing lot of the tag. Thus, the tag is permanently assignedthree separate numbers, a Tag ID, a manufacture number and a lot number.Having three separate numbers is obviously the same as concatenating thethree numbers together to form a single number. In yet anotherembodiment, overlapping sections of the Tag ID can be used by the readerduring contention resolution (e.g., bits 0-2 during a first read andbits 1-3 during a second read). Again, the size of these number (i.e.,the number of bits) is dependent on the specific application and/orinventory.

In a preferred embodiment, this assignment takes place at the time oftag manufacture. For example, the lot number may specify the date andtime of manufacture, the wafer number of the integrated circuit on thetag, etc. In a preferred embodiment, the Tag ID, manufacturer number andlot number are laser-programmed into the tag at the time of tagmanufacturer. Therefore, these values are permanently fixed at the timeof manufacture and cannot subsequently be changed. The manufacturernumber and lot number can be encrypted.

Referring to FIG. 1, in a preferred embodiment of the present invention,tag reader 104 emits a series of clock instructions. Each clockinstruction defines a time slot. Tags 102 count the time slots andcompare them to that programmed. When the time slot count is equivalentto the Tag ID programmed into a tag, the tag transmits its Tag ID to tagreader 104. In this way, tag reader 104 accumulates the Tag IDs of theinventory tags.

FIG. 2 is a flowchart depicting the operation of the present inventionaccording to a preferred embodiment. The flowchart illustrates thepresent invention's use of multiple reads and multiple tag identifiersto avoid time slot contention. Referring to FIG. 2, the tags are readfor the first time as described above with respect to FIG. 1, and asshown in a step 202. If no time slot contention is detected, as shown bythe “no” branch from step 204, then the inventory is complete andaccurate.

As described above, time slot contention occurs when multiple tagstransmit to the reader in the same time slot. The tag reader can detectthis contention in many ways that are well known in the art. Forexample, each tag could error-code its transmission, for example byusing a checksum. When the tag reader receives a tag transmission, itcomputes a checksum. If two tags transmit simultaneously, the computedchecksum will not match the transmitted checksum. When tag reader 104determines that these checksums do not match, then time slot contentionhas been detected. Other methods of detecting time slot contention maybe employed with the present invention, as would be apparent to oneskilled in the art.

If during the first tag read contention was detected, as shown by the“yes” branch from step 204, then a second tag read is performed, asshown in a step 206. While the first tag read was based on Tag IDs, thesecond tag read is based on a separate value that was permanentlyprogrammed into the tag at the time of tag manufacture. In a preferredembodiment, that second value is the manufacturer number of the tag.

During the second read, each contended tag ID is resolved separately.For each contended Tag ID, only those tags that contended for that TagID are polled. In the second read cycle, tag manufacturer numbers areused to select the time slot during which the tag will transmit. If nocontention is detected in the second read, as shown by the “no” branchfrom step 208, then the Tag IDs of the tags that contended in the firstread have been recorded by the tag reader, and the inventory iscomplete. However, if time slot contention is detected during the secondread, as shown by the “yes” branch from step 208, then a third tag readis performed, as shown in a step 210.

In the third read, each contended manufacturer number is resolvedseparately. For each contended manufacturer number, only those tags thatcontended for that manufacturer number are polled. In the third readcycle, a third permanent tag identifier is used to break the contentionof the second read. These third identifiers are programmed into each tagat the time of manufacture. In a preferred embodiment, this third valueis the lot number of the tag.

In the unlikely event that the third tag read does not resolve all timeslot contentions, further similar read operations may be performedwithout departing from the spirit and scope of the present invention.For example, further tag reads could be based on identification numbers,such as company names or numbers, bar code numbers associated with theitem attached to each tag 102, and product identifiers that identify thetypes of items attached to each tag 102.

Now the architecture of the tag is described. FIG. 3A is a circuit blockdiagram of an RFID tag according to a preferred embodiment of thepresent invention. The particular circuit of FIG. 3A is presented by wayof example only. Other circuits can be employed without departing fromthe spirit and scope of the present invention, as would be apparent toone skilled in the relevant art. Tag 102 includes at least one antenna302, a power converter 304, a demodulator 306, a clock recovery circuit308, an instruction interpreter 310, a counter/shift register 312, aplurality of laser-programmable taps 314 a-314 c, a plurality of tapdecoder logic circuits 316 a-316 c, a multiplexer 318, and a modulator320. In a preferred embodiment, antenna 302 is an omnidirectionalantenna, with its impedance matched to the frequency of transmission.

In the depicted embodiment, system power for each tag is provided by acharging signal transmitted by the reader prior to the tag readingoperation. Power converter 304 is used to convert the received chargingsignal to system power. Such power converter circuits are well known inthe art. In a preferred embodiment, the charging signal need only bepresent for a short time to fully charge the tags. In an alternativeembodiment, power converter 304 is replaced by a battery. In thatembodiment, the tag reader 104 is not required to transmit a chargingsignal.

In an alternate embodiment, power controller 304 is augmented by astorage capacitor. In this embodiment, storage capacitor provides a tagwith operating power when it is too far away from the reader to becharged by the charging signal. Also, in an alternate embodiment, powerconverter can be an energy harvester. Energy harvesting involvescapturing RF energy in any portion of the RF spectrum and converting theenergy into electrical power signals as opposed to information signals.Energy harvesting is well known to persons skilled in the relevant arts.For a tag 102, energy harvesting properties are determined by thecharacteristics of antenna 302. A fractal antenna is well suited to bothenergy harvesting and tag 102 operation, and is well known to personsskilled in the relevant arts.

Demodulator 306 receives signals from tag reader 104 via antenna 302. Ina preferred embodiment, the received signals comprise a charging signaland one or more instructions. These instructions are described in detailbelow. One such instruction includes a count instruction that instructsthe tags to increment their counter/shift registers 312. In oneembodiment, the count instruction causes counter/shift registers 312 toincrement by one; in alternative embodiments, the instruction causescounter/shift registers 312 to increment by other values.

In a preferred embodiment, the instructions are transmitted by tagreader 104 using an amplitude-modulated RF signal using a severalhundred kilohertz baud rate and a 900 megahertz carrier frequency. Tagreader 104 may vary the bit rate of these transmissions. For example,tag reader 104 may reduce the bit rate if it senses the existence of anoisy RF environment. The instructions are sent by the reader with a“return to center” data format; this format is well-known in the art.The instructions are decoded by the tag to generate digital input forinstruction interpreter 310 and a system clock. The system clock isrecovered by clock recovery circuit 308.

FIG. 3B illustrates an implementation of demodulator 306 and clockrecovery circuit 308. This implementation comprises a waveform detector340, a first detector 342, a second detector 344, and a logic gate 346.

Waveform detector 340 receives an RF signal from antenna 302 andconverts this signal into a baseband signal 348. In addition, waveformdetector 340 monitors the ambient RF environment. If waveform detectordetects spurious RF above an interference threshold, it will wait beforeoutputting a baseband signal 348. Waveform detector 340 can beimplemented through RF receiver designs well known to persons skilled inthe relevant arts.

Baseband signal 348 comprises a series of pulses, wherein a short pulserepresents a logical “0” and an extended pulse represents a logical “1”.According to a preferred embodiment, each pulse indicates the transitionfrom a presence of RF energy to an absence of energy in the RF signalreceived by waveform detector 340. However, in alternate embodiments,the pulses in baseband signal 348 may represent other occurrences in theRF signal.

According to this implementation, a clock signal is generated from arising edge of each pulse. Baseband signal 348 is input to firstdetector 342 and second detector 344.

First detector 342 generates a first output signal 350. First outputsignal 350 comprises an extended pulse for each pulse, whether short orextended, in baseband signal 348. In essence, first detector 342generates a periodic clock signal comprising a series of extendedpulses. Thus, the circuit illustrated in FIG. 3B performs the functionof clock recovery circuit 308.

Second detector 344 generates a second output signal 352. Second outputsignal 352 comprises an extended pulse for each extended pulse inbaseband signal 348.

FIG. 3C illustrates an exemplary baseband signal 348 and thecorresponding first and second output signals 350-352. As illustrated,this exemplary baseband signal 348 comprises a first short pulsefollowed by an extended pulse and a final short pulse. In response tobaseband signal 348, first output signal 350 and second output signal352 have different characteristics. First output signal 350 comprisesthree extended pulses that correspond to each of the pulses in basebandsignal 348. As stated above, this signal is a periodic clock signal.Second output signal 352 comprises a single extended pulse thatcorresponds to the extended pulse in baseband signal 348.

According to the present invention, each pulse in second output signal352 indicates a logical “1” received from reader 104. In contrast, eachpulse in third output signal 354 indicates a logical “0” received fromreader 104. Third output signal 354 is generated by inputting firstoutput signal 350 and an inverted second output signal 352 into logicgate 346. In a preferred embodiment, logic gate 346 is an AND gate.Second output signal 352 is inverted according to techniques well knownto persons skilled in the relevant arts. FIG. 3D illustrates anexemplary third output signal 354 that corresponds to the exemplaryfirst and second output signals described above. Third output signal 354comprises a pulse corresponding to the first and third pulses in firstoutput signal 350. In essence, third output signal 354 recovers alogical “0” in baseband signal 348.

Instruction interpreter 310 receives instructions from demodulator 306,and provides control signals and data to counter/shift register 312 andmultiplexer 318. Laser programmable taps 314 a-314 c are permanentlyprogrammed with predetermined values at the time of tag manufacture. Ina preferred embodiment, taps 314 a-314 c are programmed by laser-cuttingor linking specific output taps of a collection of inverters. As wouldbe apparent to one skilled in the relevant arts, other technologies canbe used to permanently program these values without departing from thescope of the present invention. In a preferred embodiment, taps 314 aare programmed with the Tag ID, taps 314 b are programmed with the tagmanufacturer number and taps 314 c are programmed with the tag lotnumber.

Decoder logic circuits 316 a-316 c are used to monitor the outputs ofprogrammable taps 314 a-314 c. For example, when the value incounter/shift register 312 is the same as the value programmed into TagID taps 314 a, Tag ID logic 316 a decodes a Tag ID enable signal, whichis provided to multiplexer 318.

Control line 322 is used by instruction interpreter 310 to indicate tomultiplexer 318 which read cycle is being executed (that is, whichpermanently-programmed tag value is being tested). For example, duringthe second read cycle, the manufacturer number is being tested. When thecounter/shift register 312 reaches the manufacturer number programmedinto manufacturer taps 314 b, manufacturer number logic 316 b providesan enable signal to multiplexer 318. This enable signal is selected bycontrol line 322 to cause shift register 312 to shift its contents (theTag ID) to modulator 320 for transmission to tag reader 104.

As will be described below, the second read cycle is initiated byproviding a second read instruction to instruction interpreter 310. Inresponse to that instruction, instruction interpreter indicates tomultiplexer 318 that the manufacturer number is being tested. Inresponse, multiplexer 318 gates only the manufacturer number enablesignal to counter/shift register 312. This enable signal causescounter/shift register 312 to shift the count, which is equivalent tothe manufacturer number, to modulator 320 for transmission to thereader. In this way, the manufacturer number of a tag is transmitted totag reader 104 when the count reaches the manufacturer number. Thus, thetime at which the tag transmits during the second read cycle iscontrolled by the tag manufacturer number. As further described below,this mechanism is used to solve time slot contention problems.

Modulator 320 transmits the data provided by counter/shift register 312to tag reader 104 via antenna 302 using amplitude-modulated (AM) RF backscatter signals. In a preferred embodiment a several hundred kilohertzbaud rate is used with a 900 megahertz carrier frequency. Because thetag system clock is derived from the signal provided by the tag reader,the data sent by the tag to the reader is clock-synchronized with thereader.

In one embodiment, tag 102 also contains one or more sensors 324. Datacollected by sensors 324 is routed to counter/shift register 312 eachtime tag 102 transmits. The sensor data is appended to the tagtransmission and recorded by tag reader 104. In one embodiment, sensor324 is a gas sensor that detects the presence of chemicals associatedwith drugs or precursor chemicals of explosives, such as methane. A tagequipped with such a sensor is a powerful mechanism for quickly locatingitems containing contraband or explosives. In another embodiment, sensor324 is a temperature detector that generates information indicating theambient temperature of tag 102. In a further embodiment, sensor 324 isan accelerometer that generates information indicating movement andvibration of tag 102. Such sensors are well known to persons skilled inthe relevant arts.

An optical sensor is another example of sensor 324. Optical sensorsdetect the presence (or absence) of light. Certain optical sensors candetect light of certain colors. Color detection enables a tag 102 toperform functions such as monitoring whether a traffic light at atraffic intersection is red, yellow, or green.

Sensor 324 may also be a pressure sensor. Pressure sensors can detectfluid pressure, atmospheric pressure, or any pressure acting on tag 102.Other examples of sensor 324 include an electrical field sensor, amagnetic field sensor, a radiation sensor, and a biochemical sensor.Sensor 324 may be implemented as a microsensor that is produced usingintegrated circuit fabrication technologies and/or micromachining.Micromachining is a set of processes which produces three-dimensionalmicrostructures using the same photographic techniques and batchprocessing as for integrated circuits. Micromachining involves producingthree-dimensional microstructures using photographic techniques andbatch processing methods similar to those used in the production ofintegrated circuits.

The architecture of tag reader 104 is now described. FIG. 4 is a circuitblock diagram of the architecture of tag reader 104 according to apreferred embodiment. The circuitry of tag reader 104 is described inthree categories: generic circuitry, processing circuitry, andapplication-specific circuitry.

Referring to FIG. 4, tag reader processing circuitry is represented bycomputer 402. Computer 402 performs high level processing functions notprovided by tag reader generic circuitry. These high level functionsinclude compiling inventory lists, handling time slot contentions, andthe like, as would be apparent to one skilled in the relevant arts.Computer 402 may be physically co-located with tag reader 104, as in thecase of a stationary tag reader, or may be physically separate from tagreader 104, as may be the case with a hand-held or portable tag reader.The connection 424 between computer 402 and command controller 404 maybe hard-wired or wireless.

Application-specific tag reader circuitry is represented by PCMCIA(Personal Computer Memory Card International Association) card 420. In apreferred embodiment, details regarding specific tags, applications,encryption scheme, sensor configuration and data, and modes of operationto be used can be embodied in PCMCIA card 420. In this embodiment, ageneric tag reader 104 can be used for multiple inventory applicationsby merely using different PCMCIA cards.

The remaining circuitry in FIG. 4 comprises tag reader genericcircuitry. This is the circuitry required by tag reader 104 to performgeneric functions under the control of computer 402 and one or morePCMCIA cards 420. Generic tag reader circuitry includes commandcontroller 404, counter/clock 406, modulator 408, one or more antennas410, demodulator 412, clock recovery circuit 414, digital processor 416,memory 424, PCMCIA decoder 418, and manual interface 422.

In a preferred embodiment, tag contention is not addressed immediatelyafter it occurs, but rather is resolved in a further read cycle. When atag contention is detected, tag reader 104 stores the contended timeslot number in memory 424. In a further read cycle, tag reader 104retrieves each contended time slot number from memory 424 forresolution. To keep track of the time slots, tag reader 104 employs aclock/counter 406. Clock/counter 406 responds to the count instructionstransmitted by tag reader 104 to tags 102. In this way, the contents ofclock/counter 406 are the same as the contents of counter/shift register312 in each tag 102. Thus, when tag reader 104 detects time slotcontention, it can record the contended time slot number by storing thecontents of clock/counter 406.

Command controller 404 generates data and instructions under the controlof computer 402. These data and instructions are transmitted viamodulator 408 and antenna 410 to tags 102. Tag transmissions arereceived via antenna 410 and demodulator 412 by digital processor 416,which communicates with computer 402 via command controller 404. In oneembodiment, a system clock may be derived by clock recovery circuit 414for use in analyzing tag transmissions. The PCMCIA card 420 is coupledto tag reader 104 via a PCMCIA decoder 418. A manual interface 422provides the operator with control over the tag reader 104.

2.0 Modes of Operation

2.1 Timed Broadcast Read

As described above, the present invention provides at least three modesof operation: timed broadcast read, immediate read, and specific tagread. Timed broadcast read allows an ensemble of tags (from a few toseveral thousand) to be read within a time frame of a few seconds. FIG.2 is a high-level flowchart of the timed broadcast read mode ofoperation of the present invention. FIG. 5 is a flowchart depicting thefirst read operation of the timed broadcast read of the presentinvention. During the first read operation, the tag reader steps thetags through a sequence of time slots. When a tag detects that a timeslot matches its preprogrammed time slot, the tag transmits its Tag ID.If more than one tag transmits in the same time slot, the tag readerstores the time slot number for future resolution of the time slotcontention.

2.1.1 First Read Cycle

Referring to FIG. 5, the timed broadcast read mode of operation beginswhen the tag reader transmits a first instruction alert to the tags, asshown in a step 502. The first instruction alert signals to the tagsthat this is the first instruction in the timed broadcast read mode ofoperation. In response, the tags initialize. In particular, the tagsinitialize their counters/shift registers 312, as shown in a step 504.The tag reader then repeatedly transmits a clock increment instruction,as shown in a step 506. In response to the increment instruction, eachtag increments the count in its counter/shift register 312, as shown inStep 508. When a tag's counter/shift register 312 output matches the TagID programmed into Tag ID taps 314 a, as indicated by the “yes” branchfrom step 510, the tag transmits its Tag ID as shown in a step 512 anddescribed above. Alternatively, the reader sends out the count number,which each tag uses to compare to its programmed time slot.

In an alternative embodiment, the tag does not transmit its Tag ID, butinstead transmits a simple response signal, when a tags counter/shiftregister 312 output matches the Tag ID programmed into Tag ID taps 314a. The response signal need not convey any information describing theidentity of the tag. Indeed, the response signal need not convey anyinformation at all. The response signal need only indicate that a tag ispresent. In this embodiment, tag reader 104 keeps track of the count inthe tag counter/shift register 312 by using an internal counter/clock406. Counter/clock 406 is initialized in step 504, and is incremented instep 508 in response to the transmitted clock instruction. When tagreader 104 receives a response signal, tag reader 104 records the countin counter/clock 406. Because the tag transmitted the response signalwhen the count in its counter/shift register 312 equaled its Tag ID, andbecause the counter/clock 406 also contains that count, the presence ofthe particular tag that transmitted the response signal is recorded byrecording the count in counter/clock 406. In a preferred embodiment, theresponse signal contains sufficient information for tag reader 104 todetect response signal contention when it occurs.

If more than one tag transmits in the same time slot, tag reader 104detects time slot contention. If time slot contention is detected, asshown by the “yes” branch from step 514, tag reader 104 stores the TagID, as shown in a step 516. Tag reader 104 keeps track of the Tag IDusing counter/clock 406. Tag reader 104 will use the Tag IDs to resolvethe time slot contention for those Tag IDs in a second read cycle, whichis described below and corresponds to step 206 in FIG. 2. Alternatively,the reader could immediately resolve the contention.

2.1.2 Second Read Cycle

In a preferred embodiment, the present invention employs a second readcycle to solve time slot contentions that occurred during the first readcycle. FIG. 6 is a flowchart depicting the operation of the presentinvention in the second read cycle according to a preferred embodiment.During the second read cycle, the system examines contentions for eachTag ID individually. For each contended Tag ID, tag reader 104 causestags 102 to count in unison. When a tag's count matches its manufacturernumber, the tag transmits that manufacturer number. In this way, thetag's manufacturer number controls the time slot during which the tagtransmits. Alternatively, the reader can transmit the second read countnumber, which the tag(s) uses to compare to its programmed time slot.Because it is highly unlikely that more than one tag will have the sameTag ID and manufacturer number, it is unlikely that two tags willtransmit in the same time slot during the second read. Therefore, Tag IDcontention is resolved by the second read. In the unlikely event thatmultiple tags have the same Tag ID and manufacturer number, contentioncan be resolved using a third read cycle, as described below.

Referring to FIG. 6, tag reader 104 initiates the second read cycle bysending a second read mode instruction to tags 102, as shown in a step602. The reader then transmits a contended Tag ID to the tags, as shownin a step 604. The step permits only those tags that contended for aparticular Tag ID to participate in contention resolution for that TagID. In response to the transmission of the contended Tag ID, only thosetags having that Tag ID initialize their counters/shift registers 312,as shown in a step 606.

Tag reader 104 then transmits the first in a series of incrementinstructions, as shown in a step 608. In response, the contending tagsincrement their counter/shift registers 312, as shown in a step 610.When the output of a tag's counter/shift register 312 matches the tagmanufacturer number permanently programmed into manufacturer number taps314 b, as indicated by the “yes” branch from step 612, the tag transmitsits manufacturer number, as shown in a step 614. Alternatively, thereader could send out the count number, which the tag(s) used to compareto its programmed time slot.

In an alternative embodiment, the tag transmits a simple response signalas described above. Tag reader 104 then records the tag's manufacturernumber by storing the count in its counter/clock 406, as described abovefor the Tag ID.

If more than one tag transmits its manufacturer number simultaneously,tag reader 104 detects the contention, as indicated by the “yes” branchfrom step 616, and tag reader 104 stores the contended manufacturernumber for future contention resolution in a third read cycle, as shownin a step 618. Alternatively, the reader could resolve the contentionimmediately.

Tag reader 104 steps tags 102 through a predetermined range of possiblemanufacturer numbers. When the last count is reached, as indicated bythe “yes” branch from step 620, the process of steps 604 through 618 isrepeated for the next contended Tag ID. When the last contended Tag IDhas been examined, as indicated by the “yes” branch from step 622, thesecond read cycle is complete.

2.1.3 Third Read Cycle

In one embodiment, the present invention employs a third read cycle toresolve any time slot contentions that occurred during the second readcycle. FIG. 7 is a flowchart depicting the operation of the presentinvention in the third read cycle according to a preferred embodiment.During the third read cycle, the system examines contentions for eachmanufacturer number individually.

For each contended manufacturer number, tag reader 104 causes tags 102to count in unison. When a tag's count matches its lot number, the tagtransmits that lot number. In this way, the tag's lot number controlsthe time slot during which the tag transmits. Because it is highlyunlikely that more than one tag will have the same Tag ID, manufacturernumber, and lot number, it is extremely unlikely that two tags willtransmit in the same time slot during the third read. Therefore, tagmanufacturer number contention is resolved by the third read. In theunlikely event that multiple tags have the same Tag ID, manufacturernumber, and lot number, contention can be resolved using a further readcycle based on other tag identification data, as would be apparent toone skilled in the relevant art using the above description.

Referring to FIG. 7, tag reader 104 initiates the third read cycle bysending a third read mode instruction to tags 102, as shown in a step702. The reader then transmits a contended Tag ID and manufacturernumber to the tags, as shown in a step 704. This step permits only thosetags that contended for a particular Tag ID and manufacturer number toparticipate in contention resolution for that Tag ID and manufacturernumber. In response to the transmission of the contended Tag ID andmanufacturer number, only tags having that particular Tag ID andmanufacturer number initialize their counters/shift registers 312, asshown in a step 706.

Tag reader 104 then transmits the first in a series of incrementinstructions, as shown in a step 708. In response, the contending tagsincrement their counter/shift registers 312, as shown in a step 710.When the output of a tag's counter/shift register 312 matches the taglot number permanently programmed into lot number taps 314 c, asindicated by the “yes” branch from step 712, the tag transmits itsmanufacturer number, as shown in a step 714. Alternatively, the readercould send out the count number, which the tag(s) uses to compare to itsprogrammed time slot number.

In an alternative embodiment, the tag transmits a simple response signalas described above. Tag reader 104 then records the tag's lot number bystoring the count in its counter/clock 406, as described above for theTag ID.

If more than one tag transmits its lot number simultaneously, tag reader104 detects the contention, as indicated by the “yes” branch from step716, and tag reader 104 stores the contended manufacturer number forfuture contention resolution in a further read cycle, as shown in a step718.

Tag reader 104 steps tags 102 through a predetermined range of possiblelot numbers. When the last count is reached, as indicated by the “yes”branch from step 720, the process of steps 704 through 718 is repeatedfor the next contended manufacturer number. When the last contendedmanufacturer number has been examined, as indicated by the “yes” branchfrom step 722, the third read cycle is complete.

2.2 Immediate Read

Immediate read mode is used to read individual tags one at a time. Inthis mode, tag reader 104 transmits an instruction to a tag 102 thatcauses the tag to bypass the time slot counting operation and toimmediately transmit its Tag ID number. This mode is useful for rapidTag identification (on the order of milliseconds) when the individualtag rapidly passes through the reader zone. An example application isthe reading of tags affixed to automobiles passing through an automatictoll booth.

2.3 Specific Tag Read

Specific tag read is used to determine whether one particular tag ispresent in an ensemble of tags. Tag reader 104 accomplishes this bytransmitting the particular Tag ID, manufacturer number, and lot numberof the tag 102 that is sought. Because a complete set of Tagidentification parameters is transmitted, only the tag being soughtshould respond. This approach is useful for retrieving a specific taggeditem from an ensemble of items, for example for locating a particularinventory item in a warehouse or retail store.

3.0 Tag Manufacture

In order to be commercially viable, the RFID tags of the presentinvention must be inexpensive to manufacture. The present inventionencompasses a unique method of manufacture to achieve this goal. FIG. 8is a flowchart depicting a method of manufacture for the RFID tag 102 ofthe present invention. This method of manufacture is described withreference to the tag pair depicted in FIG. 9. FIG. 9 depicts a pair oftags 102 a, 102 b. Such a pair of tags is ideally suited for use inapplications where two particular items need to be matched. In practice,tags 102 a and 102 b are separated by a person. Tag 102 a is affixed toa first item, while tag 102 b is affixed to a second item. In this way,the presence of both first and second items can be ensured. Each tag 102includes an antenna 302 and an application-specific integrated circuit(ASIC) 904 mounted on bonding pads. Sensor 324 may be incorporated inASIC 904. Alternatively, sensor 324 may be a separate component sharingthe same substrate with other tag 102 components.

In one embodiment, tag 102 a incorporates multiple tamper-resistantfeatures. Tag 102 a can be fixed to a first item by wrapping the tagabout a portion of the item and joining tag portions 914 a and 914 b. Inone embodiment, one area of 914 includes ASIC 904 so that attempting toseparate areas 914 a and 914 b after joining destroys the ASIC andrenders the tag inoperable. In another embodiment, tag 102 a includesone or more perforated tear lines 912. Perforated tear lines 912 teareasily, so that any tampering with tag 102 a causes the tag to separateat a tear line 912. This tearing provides an immediate visual indicationof tampering. Tear lines 912 can be placed across critical portions ofthe tag circuitry, such as antenna 302 a, such that tag separation alongtear line 912 renders the tag inoperative.

As described above, tag 102 is powered by a power source, such as abattery, in one embodiment. In this embodiment, the battery may beformed by placing an anode 910 a in one joining area 914 a of the tagand placing a cathode 910 c in the other joining area of the tag 914 b.At least one of anode 910 a and cathode 910 c is coated with aelectrolytic material and covered by a release liner. In anotherembodiment, tag 102 is powered by a capacitor. In that embodiment, atleast one of anode 910 a and cathode 910 c is coated with a dielectricmaterial and covered by a release liner. Other power sources may be usedwith tag 102 without departing from the spirit and scope of the presentinvention, as would be apparent to one skilled in the relevant art.

The two joining areas 914 a,b of tag 102 are joined by removing therelease liner and joining cathode 910 c to anode 910 a, thereby formingthe power source of the tag. Any attempt to separate areas 914 a,b afterjoining will destroy the power source formed by anode 910 a and cathode910 c, thereby rendering the tag inoperative. In another embodiment,separating areas 914 a,b after joining also gives a visual indication oftampering. For example, separating areas 914 a,b could reveal a large“VOID” sign or some other image or break pattern.

Now the manufacture of tag 102 according to a preferred embodiment isdescribed with reference to FIG. 8. In a step 804 one or more ASICs aremanufactured. The ASICs include the inventory response circuitrydepicted in FIG. 3. The circuitry includes the circuit elements of FIG.3 except antenna 302. In one embodiment, all inventory responsecircuitry is contained upon a single ASIC. In another embodiment, RFcircuitry is contained on one ASIC, and digital circuitry is containedon another ASIC. Then, in a step 806, the ASIC containing the digitalinventory response circuitry is permanently programmed with at least theTag ID and manufacturer number. In one embodiment the ASIC is alsoprogrammed with a lot number for the tag. In a preferred embodiment,these values are laser-programmed into taps 314 a-314 c, as describedabove.

Antenna 302 and bonding pads 908 are printed onto a flexible substrateusing a conductive ink or material, as shown in a step 808. Suchsubstrates are readily available from a variety of vendors. Suchconductive inks are widely available. Finally, the ASIC is flip-chipbonded to bonding pads 908 using a conductive adhesive, as shown in astep 810. One such conductive adhesive is a “z-axis” adhesive, which iswell-known in the relevant art and is commercially available. The use ofsuch an adhesive is advantageous in that adhesive conducts only in thez-axis. Therefore, even if the adhesive is applied so as toinadvertently join two bonding pads, the two pads do not short together.In one embodiment the ASIC is also hermetically sealed. In a preferredembodiment, ASIC 904 is manufactured using silicon-on-insulatortechnology.

As mentioned above, a key consideration in the manufacture of tags 102is cost. A large component of the cost of manufacture of such items isthe cost of testing the ASICs to ensure operability. In a preferredembodiment of the present invention, operability testing is deferreduntil tag manufacture is complete, as shown in a step 812. Also in thepreferred embodiment, tags 102 are manufactured in bulk on a longcontinuous strip of substrate. The strips can be rolled for easypackaging, delivery, and dispensing. Before packaging, the strip ispassed through a testing apparatus, where each tag in the strip istested for operability. However, rather than attempting to discardinoperable tags, inoperable tags are merely marked as inoperable and areretained on the strip. Then, when a person encounters a tag markedinoperable in a roll of tags, the person merely discards the inoperativetag. This process saves considerable cost, and allows the tags of thepresent invention to be manufactured very inexpensively.

4.0 Example Applications

The present invention is ideally suited to use in real time inventorycontrol and electronic article surveillance. In a retail clothing store,for example, a tag can be attached to each article of clothing ondisplay. One or more tag readers can then be used to maintain aninventory of the clothing articles. For example, a tag reader can beplaced on each rack or display of clothing. Periodic reads of the rackor display can disclose exactly when an item is removed.

Tag readers placed at the exits to the store can prevent shoplifting. Inthis example, each item bears a tag. Because the tags are extremelysmall, they can be placed within an article so as to prevent removal oreven discovery. For example, a tag could be placed within a label,button or seam of a garment, the plastic center of a compact disk, orthe case of a videocassette, to facilitate both overt and covertoperation.

The store maintains an inventory database of all the articles within thestore. Each entry in the database represents a garment and contains theTag ID of the tag embedded in the article. The entry also indicateswhether the item has been purchased. When a tag of an unpurchasedarticle is detected by a door reader, an alarm is sounded, indicatingthat the article is being shoplifted.

When an item is purchased, its tag ID is removed from the inventorydatabase. Therefore, when a tag attached to a purchased article movespast the door reader, no alarm is sounded. Used alone or with securitycameras, the present invention provides an effective tool to combatshoplifting.

In another embodiment, the present invention could be used to implementan “unattended store,” i.e. one with no salespersons or clerks. Acustomer could enter the store, select items and go to a purchasingarea. In the purchasing area, a tag reader would identify the customer'sselections. The customer would then be presented with a bill. Thecustomer could pay the bill with a credit card, whereupon the unattendedstore would remove the purchased item from its inventory database. Thecustomer could then leave the store with the purchases. Alternatively,instead of presenting the customer with a bill, an account like a creditcard account, store account, or debit account could be automaticallycharged, debited, or authenticated.

5.0 Example Instruction Set

Now an instruction set is described that can be used with the presentinvention. As would be apparent to one skilled in the relevant art,other instructions can be employed with the present invention withoutdeparting from its spirit and scope. In a preferred embodiment, thereader sends an instruction stream to the tag instruction register thatis Nir bits long, where Nir is the number of stages in the instructionregister. The instructions have the following data field format andsymbolic binary values:

Np: Preamble: alerts the tags that the reader is starting communication.This data field is useful to prevent spurious noise from “spoofing” thetags and to initialize and synchronize the tag clock. The preamblestarts with a long stream of “0” pulses from the reader, which startsthe tag clock and initializes the tag instruction register. The 0's arefollowed by Np bits of a series of “1's”, which alerts the tag that areader instruction is following. Between instruction words, the readersends out 0's for tag clock generation. When the preamble is present,the symbolic binary for this field is “1”. A “0” represents the absenceof the preamble.

Nw: Last instruction/in process/wake up: This data field is useful fordynamic read environments, where tags are moving into and out of theread zone, and prevents tags entering the read zone during a read cyclefrom erroneous communication. These tags will be “woken up” at the nextread cycle to properly be identified. The “last instruction” sub-fieldnotifies the tag to shut down. The symbolic binary form for this fieldis: ÿ First Instruction Alert: 001 ÿ Subsequent instructions after wakeup: 010 ÿ Last instruction; shut down: 100

Nt; Timed read cycle: Second read/first read: This field instructs thetag to go into the specified timed read cycle (first, second or third),with the following symbolic binary form: ÿ No timed read: 000 ÿ Firstread: 001 ÿ Second read: 010 ÿ Third read: 100 ÿ Specific read: 111

Ni; Immediate read: When the symbolic binary form is “1”, this fieldinstructs the tag to immediately send out its ID number.

Nr; Specific tag read: When the symbolic binary form is “1”, this fieldinstructs the tag to go into the specific tag read mode as designated byNt, above. The reader will cycle through three instructions to set thetag to the proper state. The first is with Nt=001 and sets the Tag IDcounter for the targeted tag. The second is with Nt=010 and sets up thesecond counter with the targeted manufacturer number. The third is withNt=100 and sets up the third counter with the targeted lot number. Thenthe reader sends out clock with Nt=111 to read only the targeted tag atevery clock instruction.

Nm; Clock/Count: This field sets the counter shift registers (SR's) intoeither the clocked mode to increment the counter by the next clocksignal, or into the SR mode, awaiting the following time slot, wafer/lotnumber, or date instruction stream. It has the symbolic binary form: ÿClocked mode: 01 ÿ Specific count: 10

Ns; Clock signal/time slot. This data field contains either specificcounter instruction data, or a stream of zeroes if the tag is beinginstructed into the count mode. The symbolic binary form is “1” whenthere is a specific counter instruction, and “0” for the count mode.When Nm=01 and Ns=0, a clock instruction counter, Nc, is enabled.

Nc: Clock instruction signal to increment counter/shift registers 312.The symbolic binary form is: ÿ No clock instruction: 00 ÿ Clock: 01 ÿLast clock: 11

The clock instruction counter, Nc, allows the reader to “short cycle”the tag through the count sequence, bypassing the Nir instructionsequence, which can be as long as 32, 48, or 64 bits. Nc, on the otherhand, could theoretically be as short as 2 bits, although 4 bits isimplemented here. Once the clock instruction is sent out, the readerwaits for a tag response. If none comes within a specified time frame,it sends out another clock instruction. When a tag responds with its IDnumber, the reader waits until the ID number transmission is completedbefore sending out the next clock instruction. If only a few tens to afew hundreds of tags are in the ensemble, this “short cycle” clockingcan accelerate tag read time by as much as a factor of 10. On completingthe clock read cycle, the full instruction register will be re-enabledfor the next sequence of instructions from the reader, such as for anyrequired contention resolution, or for tag shut down.

When the reader is “short cycling” the tags by simply sending out clockinstructions, spurious RF could cause a tag to lose its count. This willbe detected by the reader when the tag responds with its full ID becausethe count will not match the received ID. If there is no contention whenthis occurs, the reader will successfully read this tag. If suchcontention occurs due to one or more tags losing their count, the readercould resolve this contention by sending out the time slot number andworking backwards in time slots until this contention problem isresolved.

The n-bit instruction stream is organized as follows:Nir=Nc/Ns/Nm/Nr/Ni/Nt/Nw/Np, with each field comprised of sub-fields inthe format described above. This provides the generalized symbolicbinary form of Nir=xx/x/xx/x/x/xxx/xxx/x where the x's represent either1's or 0's.

As described above, this instruction stream comprises 21 states.However, according to the present invention, other states can exist. Asis apparent to persons skilled in the relevant arts, these 21 states canbe described by 5 bits. The bits necessary to hold the contents of aspecific read count preferably requires 12 bits. Therefore, according tothis instruction set, a 17 bit instruction stream is required. However,an embodiment of the present invention comprises error correction codingthat would increase the required size of the instruction stream.

Also, as described above, the instruction stream is interpreted by eachtag's instruction interpreter 310. Instruction interpreter 310 can beimplemented with a bit register. Using the 21 state example instructionset described above, a 17 bit register is required. However, instructioninterpreter may employ other size bit registers. In addition,instruction interpreter 310 can be implemented with a comparator,software, a hardwired state machine, or any combination thereof.

An example instruction stream is shown below for each operational modeof the tag. The 1's represent a resulting action or state directed by aninstruction sub-field while 0's represent the off state of aninstruction sub-field. Nc/Ns/Nm/Nr/Ni/Nt/Nw/Np Timed Broadcast Read:Initialization: 00/0/00/0/0/000/000/0 First instruction of first readcycle: 00/0/01/0/0/001/001/1 Following instructions of first read cycle:01/0/01/0/0/001/010/1 Last clock instruction: 11/0/01/0/0/001/010/1First instruction for second cycle: 00/1/10/1/0/010/010/1 Followinginstructions for second cycle: 01/0/01/0/0/010/010/1 Last clockinstruction for second cycle: 11/0/01/0/0/010/010/1 First instructionfor third cycle: 00/1/10/1/0/100/010/1 Following instructions for thirdcycle: 01/0/01/0/0/100/010/1 Last clock instruction:11/0/01/0/0/100/010/1 Last instruction (tags turn off):00/0/00/0/0/000/100/1 Immediate Read: Initialization:00/0/00/0/0/000/000/0 First instruction: 00/0/00/0/1/000/001/1 Next andlast instruction (tag turns off): 00/0/00/0/0/000/100/1 Specific TagRead: Initialization: 00/0/00/0/0/000/000/0 First instruction:00/1/10/1/0/001/001/1 Second instruction: 00/1/10/1/0/010/010/1 Thirdinstruction: 00/1/10/1/0/100/010/1 Following clock instructions:01/0/01/1/0/111/010/1 Last clock instruction: 11/0/01/0/0/111/010/1First instruction of next specific read: 00/1/10/1/0/001/010/1 Secondinstruction of next read: 00/1/10/1/0/010/010/1 Third instruction ofnext read: 00/1/10/1/0/100/010/1 Following clock instructions:01/0/01/1/0/111/010/1 Last clock instruction: 11/0/01/0/0/111/010/1 Lastinstruction (tag turns off): 00/0/00/0/0/000/100/1

6.0 Interrogation Optimization

The Timed Broadcast Mode of operation described herein is an example ofcontention resolution through multiple read cycles. The presentinvention provides a technique for defining a plurality of read cyclesso that the aggregate number of counts through the cycles is minimized.This minimization shortens the time required to perform contentionresolution. Thus, the present invention advantageously enables taginterrogation applications, such as automatic real time inventorycontrol, to be performed quickly as well as more frequently.

For interrogations that provide unique identification, each tag has adistinct tag address. For multiple read cycle interrogations, theseaddresses are decomposed into a plurality of sub-addresses, such as tagID, manufacturing number, and lot number. Each sub-address correspondsto a particular read cycle of a multiple read cycle interrogationaccording to protocols, such as the timed broadcast mode. Using thetimed broadcast mode description above as an example, a tag IDsub-address is allocated to a first read cycle, a manufacturing numbersub-address is allocated to a second read cycle, and a lot numbersub-address is allocated to a third read cycle.

A read cycle is defined by its sequential order with respect to otherread cycles and by its number of time slots. Thus, in the exampleprovided above, the three read cycles occur in a predetermined order,and each of these cycles has a number of time slots that correspond to aportion of an address space. This address space provides for the uniqueidentification of a tag population through the use of a predeterminednumber of available Tag IDs, a predetermined number of availablemanufacturing numbers, and a predetermined number of available lotnumbers. (Again, the Tag ID, manufacturing number and lot number can beconsidered a single, unique address, which has three sub-addresses.)

A challenge to interrogation protocols involves the ability to quicklyinterrogate a tag population. An address space can accommodate a largenumber of tags 102. For example, an address space that provides 10,000time slots for each of three read cycles can support a tag populationhaving as many as a trillion tags 102. Often, only a portion of anaddress space is occupied by a tag population. For instance, if a tagpopulation of one thousand tags is interrogated by an RFID system thatuses such an address space, only a billionth of the one trillionavailable addresses would be occupied.

The present invention provides techniques that flexibly define anaddress space to optimize multiple read cycle interrogations. Thisinvolves decomposing an address space into a plurality of read cyclesthat each have a distinct number of time slots. The number of time slotsfor each read cycle is designed to provide optimal interrogationefficiency for a particular tag population. In addition, the number oftime slots allocated to each read cycle can be adaptively changed basedon measured efficiency.

These techniques are described with reference to a tag population havinga number of tags, m. Interrogation of this population is performedthrough N read cycles to provide contention resolution. Each read cyclehas a number of time slots, n_(i), where i is an index that designates aparticular read cycle. For each read cycle, i, the number of time slots,n_(i), is set to optimize the interrogation process.

6.1 Address Spaces

FIGS. 11-14 are graphical representations of three-dimensional addressspaces. Each dimension corresponds to a particular read cycle. The useof three dimensions is for illustrative convenience only. The presentinvention can include address spaces having any number of dimensions(i.e., any number of read cycles). Each of these address spacesrepresents various allocations of time slots to three read cycles, whereeach dimension corresponds to a particular read cycle. Each of thesethree-dimensional address spaces demarcates a volume. The magnitude ofthis volume defines the number of tags 102 that the address space canuniquely identify. For each address space described with reference toFIGS. 11-14, these volumes are equal.

FIG. 11 illustrates a three dimensional representation of an addressspace 1100 having a uniform number of time slots for three read cycles.Thus, for uniform address space 1100, the following relationship exists:n₁=n₂=n₃.

According to the present invention, one or more dimensions of amultidimensional address space are altered to match the tag populationthat is being interrogated. Thus, for each altered dimension (i.e., readcycle), the corresponding number of time slots is reduced to eliminateunnecessary iterations or counts through empty addresses. FIGS. 12-14show how address spaces can be altered.

FIG. 12 illustrates a three dimensional representation of a firstaltered address space 1200. Address space 1200 is expanded in the firstdimension. Thus, the first read cycle has more time slots than thesecond and third read cycles. Accordingly, for address space 1200, thefollowing relationships exist:n₁>n₂; andn₁>n₃.

FIG. 13 illustrates a three dimensional representation of a secondaltered address space 1300. Altered address space 1300 is expanded inthe second dimension. Therefore, the second read cycle has more timeslots than the first and third read cycles. Accordingly, for addressspace 1300, the following relationships exist:n₂>n₁; andn₂>n₃.

FIG. 14 illustrates a three dimensional representation of a thirdaltered address space 1400. Altered address space 1400 is expanded inthe third dimension. Therefore, the third read cycle has more time slotsthan the first and second read cycles. Accordingly, for address space1400, the following relationships exist:n₃>n₁; andn₃>n₂.

6.2 Interrogation Efficiency

The present invention advantageously provides enhanced interrogationefficiency. Interrogation efficiency is a performance metric determinedby comparing the actual time it takes to perform an interrogationagainst a minimum possible interrogation time. Minimum possibleinterrogation time is the time required to perform an interrogation whenno contention occurs. Thus, for a tag population having m tags, minimuminterrogation time is achieved when the identity of all m tags areresolved in the first read cycle. Interrogation efficiency is calculatedaccording to the following equation:E=T _(min) /T _(actual), where:

-   -   E is interrogation efficiency;    -   T_(actual) is the actual time it takes to perform an        interrogation of a tag population; and    -   T_(min) is the minimum possible time required to interrogate the        same tag population.

Interrogation efficiency can be calculated from probability models that,the expected number of contention errors in a particular read cycle, i,is expressed by the term n_(C) _(i) , which is approximated by thefollowing relationships:$n_{Ci} = \frac{n_{i}}{\left( {1 + \frac{n_{i}}{m_{i}}} \right)^{2}}$$m_{C_{i}} = \frac{m_{i}\left( {1 + \frac{2n_{i}}{m_{i}}} \right)}{\left( {1 + \frac{n_{i}}{m_{i}}} \right)^{2}}$${{and}\quad m_{i}} = {{\frac{m_{{Ci} - 1}}{n_{{Ci} - 1}}\quad{for}\quad m} \geq 2}$where  m₁ = m.

Actual interrogation time is calculated from C_(i) according to thefollowing relationship:$T_{actual} = {T_{s}\left\lbrack {n_{1} + {\sum\limits_{i = 2}^{N}{n_{i}{\prod\limits_{j = 1}^{i - 1}\quad n_{Cj}}}}} \right\rbrack}$where

-   -   T_(actual) is actual interrogation time;    -   T_(S) is the interrogation time per time slot;    -   n_(i) is the number of time slots for read cycle i; and    -   n_(C) _(j) is the expected number of contentions for read cycle        j.

The above relationship is based on probability models that are apparentto persons skilled in the relevant art(s).

Assuming a random tag distribution, the vendor can calculate theprobable number of tags from:$m = \frac{n_{1}\sqrt{\frac{n_{Ci}}{n_{1}}}}{\sqrt{1 - \sqrt{n_{{Ci}/n_{1}}}}}$

The present invention advantageously allows for the creation of variousefficiency profiles. However, each of these various efficiency profilesprovides optimal interrogation efficiency for different size tagpopulations. One technique of providing optimal interrogation efficiencyinvolves adjusting the number of time slots allocated to the first readcycle.

6.3 Static Optimization

FIG. 15 is a flowchart illustrating a static optimization operation.This operation is used to optimize a tag interrogation process that usesmultiple read cycles.

In a step 1502, an expected tag population is estimated for a givenapplication. This step comprises estimating a normal value of m.

Next, in a step 1504, an efficiency profile is selected that matches theestimate performed in step 1502. Large number statistics used here showthat n₁=1.21 sqrt(m) is an optimal selection, with n₂=0.5n₁, and n₃=2,and subsequent read cycles set at 2 time slots each. This is one exampleof an optimization scheme. Other statistical assumptions would yielddifferent optimization results.

After step 1504, a step 1506 is performed. In this step, interrogationread cycles are defined according to efficiency profile selected in step1504. This step comprises the steps of setting the number of time slotsallocated to one or more read cycles. These values may be pre-coded intoa reader for particular application.

6.4 Dynamic Optimization

FIG. 10 is a flowchart illustrating a dynamic optimization operation.This operation is used to optimize a tag interrogation involving aplurality of interrogations that employ multiple read cycles. FIG. 10 isdescribed with reference to the interrogation scenario shown in FIG. 1,which includes a reader 104 interrogating a tag population that includesa plurality of tags 102A-102G.

In a step 1002, an unknown tag population is dynamically evaluated. Thisstep comprises setting a first guess for n₁=n₁ ₀ . The probable tagdistribution is calculated from m={n₁ ₀ sqrt(n_(C) ₁ /n_(C) ₁ ₀)/└1−sqrt(n_(C) ₁ /n₁ ₀ )┘}, and n₁ is then set to n₁=1.21 sqrt(m).

Next, in a step 1004, an efficiency profile is selected that matches theevaluation performed in step 1002. As with the use for staticoptimization, setting n₂=0.5n₁, and n_(i)=2 for I=3 to N yields maximumefficiency (greater than 80%). Alternatively, a fixed number of timeslots for n₁ can be queried with varying “step” sizes. For example, ifn₁ comprised of 1024 time slots, the reader could interrogate the firstcycle in 8 steps each comprising 128 time slots. It would then calculatem for the resulting contention value, n_(C) ₁ , and set subsequent stepsizes accordingly.

After step 1004, a step 1006 is performed. In this step, interrogationread cycles are defined according to efficiency profile selected in step1004. This step comprises the steps of setting the number of time slotsallocated to one or more read cycles.

A step 1008 follows step 1006. In step 1008, interrogation efficiency ismeasured. This measurement is performed over a measurement epoch. Ameasurement epoch is one interrogation (i.e., one iteration through oneor more read cycles to identify each tag in a tag population). However,an interrogation epoch can be a plurality of interrogations.

After step 1008, a step 1010 is performed. In step 1010, reader 104determines whether the interrogation efficiency measured in step 1008 isacceptable. This step comprises determining whether the measuredinterrogation efficiency is greater than a predetemnined threshold. Ifthe measured interrogation efficiency is acceptable (e.g, greater than apredetermined threshold), then operation proceeds to step 1008, whereinterrogation efficiency will be measured in future interrogationepochs. Otherwise, if the measured interrogation efficiency is notacceptable, then operation proceeds to step 1002, where the measuredefficiency is used to perform tag population evaluation.

6.5 Exemplary Address Space

In an embodiment, each tag in a tag population is uniquely marked with aset of sub-addresses that are associated with a various aspects of a tagor product manufacturing process. This approach enables sub-addresses torepeat in a predictable way within a manufacturing process. An exampleof such an addressing convention is provided below in Table 3. Inaddition to encoding manufacturing information, this addressingconvention includes a sub-address that corresponds to product type. Fora tag, product type indicates the object that the tag is to be attached.An exemplary scheme used for product type encoding is Universal ProductCodes (UPCs). This convention accommodates approximately 1000 milliondifferent unique tag addresses. TABLE 3 Sub- Number of address Number ofRegister Field Sub-address Description Time Slots Bits 1 Packagehierarchy 16 4 2 Product type 128 7 3 A serial number that repeatsseveral 65,536 16 times over a single wafer. 4 A particular wafer numberwithin a 64 6 lot of wafers. 5 A number associated with a particular 8 3lot that includes a plurality of wafers. 6 Date of manufacture 1024 10 7Plant ID number 16 4 TOTALS 1000 trillion 50

The addressing convention above provides a scheme that enablesmanufacturing and product information to be determined from a tagaddress. However, this convention does not preclude utilization of theaddress space optimization techniques described herein.

The specific scheme of Table 3 is by way of example only. An alternativescheme could simply be the UPC code plus a serial number that givesuniqueness to all products within that particular UPC code. This andother schemes will be evident by those skilled in the art and would beincluded in the spirit and scope of the invention. An alternative schemecould simply be the UPC code plus a serial number that gives uniquenessto all products within that particular UPC code. This and other schemeswill be evident by those skilled in the art and would be included in thespirit and scope of the invention.

Best efficiency in particular applications may be obtained through ahashing type code introduced into the first portions of the tag ID. Thehashing code can be computed from the remainder of the tag address Theuse of a hashing code results in a near even distribution of tags in thefirst read cycles given any sparsely populated address space. One suchexample would be the use of a cyclic redundancy code (CRC). This is apreferable choice as it can also be used to fairly accurately detecttransmission errors as well. Other hashing mechanisms for particularapplications will be obvious to those skilled in the art and would beincluded in the spirit and scope of the invention.

7.0 CONCLUSION

While various embodiments of the present invention have been describedabove, it should be understood that they have been presented by way ofexample, and not limitation. It will be apparent to persons skilled inthe relevant arts that various changes in form and detail can be madetherein without departing from the spirit and scope of the invention.Thus the present invention should not be limited by any of theabove-described exemplary embodiments, but should be defined only inaccordance with the following claims and their equivalents.

1. A method of optimizing an interrogation of a tag population that includes a plurality of tags, comprising: defining a number of time slots allocated to a first read cycle; and selecting a different number of time slots allocated to a second read cycle based on a duration of the first read cycle.
 2. The method of claim 1, further comprising: computing a number of tags in the tag population based on the number of time slots allocated to the first read cycle.
 3. The method of claim 1, further comprising: defining a step size for the first read cycle, wherein the step size comprises at least one time slot.
 4. The method of claim 3, further comprising: selecting a different step size for the second read cycle based on the duration of the first read cycle.
 5. The method of claim 1, further comprising: measuring interrogation efficiency during a measurement epoch; determining whether the measured interrogation efficiency is acceptable; and repeating the defining and selecting steps if the measured interrogation efficiency is not acceptable.
 6. The method of claim 5, wherein the determining step comprises the step of determining whether the measured interrogation efficiency is greater than a predetermined threshold.
 7. The method of claim 5, wherein the measuring step comprises the step of calculating: E=T _(min) /T _(actual), wherein:E is the interrogation efficiency; T_(actual) is the actual time it takes to perform an interrogation of a tag population; and T_(min) is the minimum possible time required to interrogate the same tag population.
 8. A system for optimizing an interrogation of a tag population that includes a plurality of tags, comprising: means for defining a number of time slots allocated to a first read cycle; and means for selecting a different number of time slots allocated to a second read cycle based on a duration of the first read cycle.
 9. The system of claim 8, further comprising: means for computing a number of tags in the tag population based on the number of time slots allocated to the first read cycle.
 10. The system of claim 8, further comprising: means for defining a step size for the first read cycle, wherein the step size comprises at least one time slot.
 11. The system of claim 10, further comprising: means for selecting a different step size for the second read cycle based on the duration of the first read cycle.
 12. The system of claim 8, further comprising: means for measuring interrogation efficiency during a measurement epoch; means for determining whether the measured interrogation efficiency is acceptable; and means for repeating the defining and selecting means if the measured interrogation efficiency is not acceptable.
 13. The system of claim 12, wherein the means for determining comprises means for determining whether the measured interrogation efficiency is greater than a predetermined threshold.
 14. The system of claim 12, wherein the means for measuring comprises means for calculating: E=T _(min) /T _(actual), wherein:E is the interrogation efficiency; T_(actual) is the actual time it takes to perform an interrogation of a tag population; and T_(min) is the minimum possible time required to interrogate the same tag population. 